Some modern multiprocessor systems include more than one type of processors, such as the “Big” (B-type) and “Little” (L-type) multiprocessor systems. The L-type processors are relatively battery-saving and low performance, while the B-type processors are relatively more powerful and power hungry. Typically, the B-type and L-type processors have the same instruction set architecture (ISA), such that the same set of instructions may be executed on both processor types. One advantage of such systems is that the performance requirements of the system workload may be matched up with the processing capabilities of the processors, thereby optimizing power efficiency of the system.
For example, ARM® big.LITTLE™ processing systems are widely adopted in the industry for delivering high performance with power optimization. The big.LITTLE processing system includes B-type processors and L-type processors, both of which implement the same ISA. However, the B-type processors and the L-type processors have different hardware designs in one or more of the following structural aspects: decode width, pipeline depth, execution order (in-order vs. out-of-order), branch prediction, etc.
Some of the big.LITTLE processing systems allow the B-type processors and the L-type processors to operate concurrently at different frequencies. To enable the processors at different frequencies to connect to the memory, an asynchronous bridge (e.g., the ADB-400) is added between each processor and the interconnect that leads to the memory. Adding the asynchronous bridges incur additional hardware cost and latency to the system.
On the other hand, operating a system with the same frequency for all processor types at the same time may compromise the performance of the different processor types. Therefore, there is a need to improve the power and performance management of a multiprocessor system that includes processors of different types or different characteristics.